Introduction:
Fixed-frequency peak current mode PWM (Pulse Width Modulation) has several advantages over traditional voltage mode control for DC-DC converters. These include better transient response, higher output precision, and stronger load capacity, making it widely used. As a key analog component, the slope compensation circuit and current sampling circuit form the foundation of current mode PWM control and play a crucial role in stabilizing the current loop within current mode control systems.
1. Circuit Structure:
Figure 1 illustrates the block diagram of a typical peak current mode PWM Boost DC-DC control system. When the voltage feedback signal of the voltage outer loop is sent to the PWM comparator through the error amplifier, a triangular wave or trapezoidal sharp-angled composite wave whose peak value represents the peak value of the output inductor current and a peak of the current inner loop compares the signal VE to obtain a PWM pulse turn-off threshold. This is expressed as follows:
In equation (1), the first term is the slope compensation part ensuring the stability of the current loop; the second term reflects the magnitude of the inductor current, usually generated by the current sampling circuit; the third term generates a fixed base level, providing a suitable DC operating point for the PWM comparator input. Therefore, the peak current mode control indirectly controls the PWM pulse width by controlling the magnitude of the inductor current at the peak output, rather than directly controlling it with the voltage error signal.
However, the inherent structure of the current mode leads to issues such as open-loop instability, subharmonic oscillation, non-ideal loop response, and vulnerability to noise when the duty cycle exceeds 50%. To address these problems, in addition to RC series compensation of the voltage loop, the current loop must also be compensated to meet stability requirements. An effective solution involves using slope compensation techniques to reduce sampling loss while improving current sampling accuracy to ensure the stability of the current loop.
In this paper, the V/I conversion of the voltage on the oscillator charge and discharge capacitor is utilized to achieve a stable slope with easy slope adjustment. Additionally, the power SENSEFET is employed as the sampling device, allowing for independent V/I conversion without combining sampling factors. This approach achieves higher precision sample values while reducing losses.
2. Circuit Principle Analysis:
2.1 Slope Compensation:
Figure 2 demonstrates the method of superimposing the slope compensation voltage on the error signal VE. VE is the error amplification signal of the voltage feedback loop. The solid line waveform represents the undisturbed inductor current, while the dashed line indicates the inductor current superimposed with the ΔI0 disturbance amount. D is the duty ratio, and m1 and m2 are the equivalent inductor currents obtained by sampling rise and freewheeling slopes, respectively.
From Figures 2(a) and (b), it can be observed that without slope compensation, in the next cycle, the disturbance current is:
After n cycles, the current error ΔIn caused by ΔI0 is:
From equation (3), it can be seen that when m2 < m1, i.e., D < 50%, the current error ΔIn will gradually tend to zero, thus stabilizing the system. Conversely, when m2 > m1, i.e., D > 50%, the current error ΔIn will gradually increase, leading to system instability.
Figure 2(c) shows the inductor current waveform after the compensation voltage is superimposed at D > 50%. For this waveform, there are:
To stabilize the loop, it is necessary to make â–³I1 < â–³Io, satisfying:
This ensures that the system remains stable even under conditions where the duty cycle exceeds 50%.
Overall, the implementation of slope compensation plays a critical role in maintaining the stability and performance of the current mode PWM control system, especially under challenging operating conditions. Further optimization of the sampling and compensation techniques can lead to even more robust and efficient designs in practical applications.
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