Then you can turn on the power to download the cable and the development board. Next, click on “Analyze Design Using ChipScope†in the project folder view of ISE Project Navigator. ISE can automatically complete the translation, mapping, layout and routing, generate programmable download files, etc., and after all operations are completed, chipscope Pro Analyzer The main interface is shown in Figure 8.
Figure 8 Configuring the JTAG chain
Click on the icon in the upper left corner of the JTAG chain and enter the interface for selecting the device. Here we select the corresponding FPGA device, the XC3S400. Right click on it and select config, as shown in Figure 9. 
Figure 9 Configuring the FPGA device
The configuration method in the FPGA is shown in Figure 10. Here you need to select the Import Design-level CDC File to download the previously configured Chipscope core to the device. 
Figure 10 FPGA configuration method
Once done, double-click on the trigger setup, as shown in Figure 11. 
Figure 11 Configuring the trigger setup
Next, click on Waveform and you will be taken to the waveform interface. The waveform can be acquired by clicking the black right triangle symbol on the toolbar, as shown in Figure 12. You can see that the waveform of the counter has been collected correctly. 
Figure 12 Waveform interface
Although the operation is more skilled, but typing and screenshots took nearly two hours, it is still not easy to think clearly. Speaking of this, this serial is over, thank you.
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