CCFL electronic transformers are also known as CCFL electronic ballasts. Most CCFL electronic transformers are powered by low voltage (3 to 30V) DC. Therefore, the DC/AV inverter inverts the DC voltage to a high frequency (20 kHz to 100 kHz) voltage, and then generates a high voltage of 250 to 650 V and a current of 2 to 8 mA through a step-up transformer for the CCFL to operate. The trigger starting voltage range of CCFL is mostly between 6001500V and is also provided by electronic transformers. CCFL electronic drivers mostly use full-bridge or push-pull circuit structures. The full-bridge driver circuit requires four switches (MOSFETs), but the output power is twice as large as the half-bridge with only two switches.
The full-bridge electronic transformer circuit using the controller MAX8722A is shown in Figure 1. The circuit's DC input voltage VIN is 8 ~ 24V, CCFL lamp voltage is 650V, lamp current is 6mA, trigger start voltage is 1600V (effective value), specifically used for backlighting of large-screen TFT-LCD flat panel display. The digital PWM (DPWM) frequency of the circuit is determined by the external resistor R1 of IC8 (the value is fDPWM=209Hz+169kΩ/R1=209Hz), and the lamp operating frequency is between 45kHz and 65kHz.
The IC(23) pin outputs a regulated voltage of 5.3V, which is supplied to the IC's low/high-side MOSFET gate driver via the VDD pin of the IC and the dual diodes D1 and (16) and (15).
If the full-bridge power stage is represented by a high-frequency square wave signal source, the leakage inductance of the secondary winding of the transformer is L. Since C9≤C10 (can ignore the influence of C10), the simplified circuit of the inverter is shown in Figure 2. If the turns ratio (ie, boost ratio) between the T1 secondary and primary windings is N, the capacitance reflected to the secondary winding is C8' (C8'=C8/N2), and the idealized equivalent resistance of the CCFL is RL. The equivalent circuit after removing the transformer T1 is shown in Figure 3. Figure 4 shows the resonant tank voltage gain frequency response curve under different load conditions. The frequency curve has a series resonance peak fs determined by L and C8' and a parallel resonance peak FP = 1/2πLC8' determined by L, C8' and C9, and fS = 1/2π 
Before the CCFL triggers the startup, the CCFL is not conducting, its impedance is infinite, and the circuit operating point is close to fP, exhibiting parallel resonance characteristics. Like a voltage source, it will generate a high voltage of 1600V to ionize the gas inside the lamp (æ°–-argon and mercury). Turn on and turn on the light. Once the lamp is illuminated, the lamp resistance drops sharply, the operating point moves toward fS, and the circuit operates in series resonant mode, like a current source.
A resistor divider (R2/R3) connected to the MAX8722A3 pin is used to regulate and set the primary overcurrent protection level of transformer T1. The circuit also provides T1 secondary current limiting and secondary overvoltage and lamp drop protection. R4 is the T1 secondary winding current sense resistor, the C9/C10 capacitor divider is used to detect the secondary overvoltage, and R5 is used as the sense lamp current.
All CCFL electronic transformers used for LCD backlighting must be equipped with dimming function. When in
When the MAX8722A5 pin is applied with an analog dimming control voltage of 0~2V, the brightness of the lamp changes from 10% to 100%, as shown in Figure 5. CCFL lamp brightness can also be controlled using digital pulse width modulation (DPWM) low frequency signals from 100 to 350 Hz. The lamp brightness is proportional to the DPWM duty cycle, and the DPWM duty cycle can be adjusted from 9.375% to 100% using the IC pin CNTL. There are three ways to set the DPWM frequency:
(1) A resistor (such as RI in Figure 1) is connected between the FREQ pin and ground. The resistance range is between 353kΩ and 101kΩ. When R1 = 169kΩ is selected, fDPWM = 209Hz. In this method, the sync pin SYNC should be grounded and the DPWM signal output from pin DPWM.
(2) Connect the pin FREQ to VCC, and add a high frequency signal fEXT of 13 kHz to 45 kHz to the foot SYNC, and output a low frequency signal of 100 to 350 Hz on the foot DPWM. The relationship between fDPWM and fEXT is: fDPWM=fEXT/128
(3) Connect a 100kΩ resistor to ground on pin FREQ, connect SYNC to VCC, and add a low-frequency signal of 100-350Hz to DPWM. In this case, the fDPWM and duty cycle are equal to the external signal.
Designed in a BiCMOS process, the MAX8722A contains 2,985 transistors and provides all the necessary functions for the CCFL. In the circuit shown in Figure 1, one or more transformers can be paralleled in the primary of T1 to drive two or more CCFL lamps. The transformer T1 boost ratio (N) is 93, and the secondary winding leakage inductance L = 260 mH.
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